Conventional computing systems include a variety of peripheral devices, such as input/output (I/O) devices and storage devices that communicate with the computing systems' processing unit via an Industry Standard Architecture (ISA) bus or an Expansion bus (X-bus). In order to interface the processing unit with the peripheral devices, the processing unit includes a large amount of pins, and an associated circuitry to support the ISA bus signals or the X-bus signals support.
However, large number of pins needed to support the ISA bus and the X-bus results in reduction in efficiency in terms of manufacturing quality and reliability, and increase in size of the computing systems, which in turn adds to overall cost of the computing system. To make the computing systems, or to say, processing units of the computing systems somewhat compact and efficient, a low pin count (LPC) bus is implemented, which supports the peripheral devices with relatively lesser number of pins.
Generally, multiple platform components, such as embedded controller, super I/O chip, firmware hub, keyboard controller, and mouse controller, are interfaced with the LPC bus. Further, to facilitate a seamless access to the peripheral components by the processing unit the platform components are controlled by a controller often referred to as a LPC controller. The LPC controller typically supports a single processing unit; accordingly a single processing unit accesses the platform components, and in turn the peripheral devices.